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ltc3562 1 3562fa l , lt, ltc, ltm and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. features applications description i 2 c quad synchronous step-down dc/dc regulator 2 600ma, 2 400ma the ltc ? 3562 is a quad high ef? ciency monolithic syn- chronous step-down regulator with an i 2 c interface. two regulators are externally adjustable and can have their feedback voltages programmed between 425mv and 800mv in 25mv steps (type a). the other two regulators are ? xed output regulators whose output voltages can be programmed between 600mv and 3.775v in 25mv steps (type b). all four regulators operate independently and can be put into pulse skip, ldo, burst mode operation, or forced burst mode operation through i 2 c control. the type-a regulators have separate run pins that can be enabled if i 2 c control is unavailable. the 2.85v to 5.5v input voltage range makes the ltc3562 ideally suited for single li-ion battery-powered applica- tions. at low output load conditions, the regulators can be switched into ldo, burst mode operation, or forced burst mode operation, extending battery life in portable systems. the quiescent current drops to under 100a with all regulators in ldo mode, and under 0.1a when all regulators are shut down. switching frequency is internally set to 2.25mhz, allowing the use of small surface mount inductors and capacitors. all regulators are internally compensated. the ltc3562 is available in a low pro? le 3mm 3mm qfn package. high ef? ciency quad step-down converter with i 2 c n four independent i 2 c controllable step-down regulators (2 600ma, 2 400ma) n two i 2 c programmable feedback voltage regulators (r600a, r400a): v fb 425mv to 800mv n two i 2 c programmable output voltage regulators (r600b, r400b): v out 600mv to 3.775v n programmable modes: pulse skip, ldo, burst mode, ? forced burst mode operation n quiescent current < 100a (all regulators enabled in ldo mode) n fixed 2.25mhz switching frequency (pulse skip mode) n slew limiting reduces switching noise n power-on reset output for regulator r600a n small, thermally enhanced, 20-lead 3mm 3mm qfn package n miscellaneous handheld applications with multiple supply rails n personal information appliances n wireless and dsl modems n digital still cameras n mp3 players n portable instruments r600x burst mode ef? ciency and power loss vs load current typical application sw400a sda scl dv cc por 100k 10pf 3.3 h 4.7 h 634k 10 f fb400a run400a sw400b por600a v in scl sda dv cc sw600a fb600a run600a sw600b out400b out600b pgnd agnd ltc3562 v out 400a 1.5v 400ma li-ion/polymer 3.4v to 4.2v microprocessor 3562 ta01 10 f 475k 536k 10pf 10 f 499k 4.7 h v out 400b 1.2v 400ma 10 f 3.3 h v out 600b 3.3v 600ma v out 600a 1.8v 600ma 10 f + load current (ma) 0.01 40 efficiency (%) power loss (mw) 50 60 70 80 0.1 1 100 10 1000 30 20 10 0 90 100 10 100 1000 1 0.1 10000 3562 ta01b v in = 3.8v v out = 3.3v v out = 1.2v v out = 3.3v v out = 2.5v v out = 1.2v, 1.8v, 2.5v v out = 1.8v
ltc3562 2 3562fa lead free finish tape and reel part marking package description temperature range ltc3562eud#pbf ltc3562eud#trpbf lcpv 20-lead (3mm 3mm) plastic qfn ?40c to 85c consult ltc marketing for parts speci? ed with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ order information electrical characteristics pin configuration absolute maximum ratings v in ............................................................... ? 0.3v to 6v run600a ...................................... ? 0.3v to (v in + 0.3v) run400a ...................................... ? 0.3v to (v in + 0.3v) fbx ............................................................... ? 0.3v to 6v swx ............................................................. ? 0.3v to 6v outx ............................................................ ? 0.3v to 6v dv cc , por600a , sda, scl ......................... ? 0.3v to 6v i sw400x (dc) ........................................................600ma i sw600x (dc) ........................................................850ma operating temperature (note 2)...............? 40c to 85c storage temperature range ...................? 65c to 125c junction temperature (note 3) ............................. 125c (notes 1, 2) parameter conditions min typ max units v in input voltage range l 2.7 5.5 v v in input current (per regulator enabled) pulse skip mode, i out = 0 burst mode operation, i out = 0 forced burst mode operation, i out = 0 ldo mode, i out = 0 shutdown mode, i out = 0, dv cc = 1.8v 220 35 25 24 0.7 60 40 40 3 a a a a a v in shutdown current all regulators in shutdown, dv cc = 0v 0.1 1 a run600a, run400a input high threshold l 1.0 v run600a, run400a input low threshold l 0.3 v run600a, run400a input high current runx = v in ?1 1 a run600a, run400a input low current runx = 0v ?1 1 a por600a threshold percentage of r600a?s final output voltage ?8 % por600a on-resistance 16 40 1 por600a delay 231 ms 20 19 18 17 16 7 8 top view 21 ud package 20-lead (3mm 3mm) plastic qfn 9 10 agnd fb400a out400b sw400b pgnd por600a fb600a out600b sw600b pgnd sda scl dv cc run600a run400a sw400a v in v in v in sw600a 12 11 13 14 15 4 5 3 2 1 6 t jmax = 125c, e ja = 68c/w exposed pad (pin 21) is gnd, must be soldered to pcb the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c, v in = 3.8v, unless otherwise noted.
ltc3562 3 3562fa buck dc/dc electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c, v in = 3.8v, v outx = 1.5v, unless otherwise noted. electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c, v in = 3.8v, unless otherwise noted. parameter conditions min typ max units i 2 c port dv cc operating voltage l 1.5 5.5 v dv cc operating current dv cc = 1.8v, serial port idle 1 a dv cc uvlo threshold voltage 1v v il sda, scl (low level input voltage) 0.3 ? dv cc v v ih sda, scl (high level input voltage) 0.7 ? dv cc v v ol sda (digital output low) i pullup = 3ma 0.08 v serial port timing (note 4) t scl clock operating frequency 400 khz t buf bus free time between stop and start conditions 1.3 s t hd,sta hold time after (repeated) start condition 0.6 s t su,sta repeated start condition setup time 0.6 s t su,sto stop condition setup time 0.6 s t hd,dat(out) data hold time 225 ns t hd,dat(in) input data hold time 0 900 ns t su,dat data setup time 100 ns t low clock low period 1.3 s t high clock high period 0.6 s t f clock data fall time 20 300 ns t r clock data rise time 20 300 ns t sp spike suppression time 50 ns parameter conditions min typ max units regulators r600a, r400a, r600b, r400b f osc 1.91 2.25 2.59 mhz maximum duty cycle pulse skip mode 100 % ldo mode closed loop r out ldo mode 0.25 regulators r600a, r600b pmos switch current limit pulse skip mode 850 1200 1500 ma pmos r ds(on) 0.38 nmos r ds(on) 0.38 ldo mode open loop r out ldo mode 2.2 available output current forced burst mode ldo, v out = 1.2v 75 50 140 ma ma sw pull-down in shutdown shutdown 2.5 k
ltc3562 4 3562fa parameter conditions min typ max units regulators r400a, r400b pmos switch current limit pulse skip mode 600 800 1000 ma pmos r ds(on) 0.5 nmos r ds(on) 0.5 ldo mode open loop r out ldo mode 3 sw pull-down in shutdown shutdown 2.5 k available output current forced burst mode ldo mode, v out = 1.2v 50 50 100 ma ma regulators r600a, r400a v fb(max) dac = xxx1111, pulse skip mode l 0.776 0.800 0.824 v v fb(min) dac = xxx0000, pulse skip mode l 0.412 0.425 0.438 v v fb(step) (0 to 15) 25 mv i fb fb input current dac = xxx1111 C50 0 50 na regulators r600b, r400b v out(min) v in = 4v, dac = 0000000, pulse skip mode l 0.582 0.600 0.618 v v out(max) v in = 4v, dac = 1111111, pulse skip mode l 3.661 3.775 3.889 v v out(step) (0 to 127) v in = 4v 25 mv electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c, v in = 3.8v, v outx = 1.5v, unless otherwise noted. note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc3562e is guaranteed to meet performance speci? cations from 0c to 85c. speci? cations over the C40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process control. note 3: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. overtemperature protection is active when junction temperature exceeds the maximum operating junction temperature. continuous operation above the speci? ed maximum operating junction temperature may result in device degradation or failure. note 4: the serial port is tested at rated operating frequency. timing parameters are tested and/or guaranteed by design.
ltc3562 5 3562fa typical performance characteristics ef? ciency vs load current ef? ciency vs load current ef? ciency vs load current ef? ciency vs load current ef? ciency vs input voltage burst mode operation ef? ciency vs input voltage burst mode operation output transient burst mode operation output transient pulse skip mode start-up transient pulse skip mode i out (ma) 0.01 40 efficiency (%) 50 60 70 80 0.1 1 100 10 1000 30 20 10 0 90 100 3562 g01 pulse skip v in = 3.8v v out = 1.2v forced burst mode operation 600ma bucks burst mode operation i out (ma) 0.01 40 efficiency (%) 50 60 70 80 0.1 1 100 10 1000 30 20 10 0 90 100 3562 g02 pulse skip v in = 3.8v v out = 1.8v burst mode operation forced burst mode operation 600ma bucks i out (ma) 0.01 40 efficiency (%) 50 60 70 80 0.1 1 100 10 1000 30 20 10 0 90 100 3562 g03 pulse skip v in = 3.8v v out = 2.5v burst mode operation forced burst mode operation 600ma bucks i out (ma) 0.01 40 efficiency (%) 50 60 70 80 0.1 1 100 10 1000 30 20 10 0 90 100 3562 g04 pulse skip v in = 3.8v v out = 3.3v burst mode operation forced burst mode operation 600ma bucks input voltage (v) 2.5 0 efficiency (%) 20 40 60 3 3.5 4 4.5 5 80 100 10 30 50 70 90 5.5 i out = 0.1ma i out = 1ma i out = 10ma i out = 100ma i out = 400ma v out = 1.2v 3562 g05 input voltage (v) 2.5 0 efficiency (%) 20 40 60 3 3.5 4 4.5 5 80 100 10 30 50 70 90 5.5 i out = 0.1ma i out = 1ma i out = 10ma i out = 100ma i out = 400ma v out = 1.8v 3562 g06 50 s/div v out400b 50mv/div ac coupled v out400a 50mv/div ac coupled 300ma 5ma 3562 g07 v out400b = 1.2v v out400a = 1.2v i out400a = 20ma i out400b 50 s/div v out400b 50mv/div ac coupled v out600b 50mv/div ac coupled 300ma 5ma 3562 g08 v out400b = 1.8v v out600b = 1.2v i out600b = 15ma i out400b 50 s/div v out600a 500mv/div inductor current i l = 100ma/ div 2v/div on 3562 g09 v out600a = 1.2v r load = 6 run600a off
ltc3562 6 3562fa typical performance characteristics r600a feedback voltage vs temperature oscillator frequency vs temperature output voltage vs load current (b version) dynamic supply current vs input voltage dynamic supply current vs input voltage burst mode operation forced burst mode operation output voltage vs load current switch r ds(on) vs input voltage temperature (c) C50 0.790 voltage (mv) 0.794 0.798 0.802 C25 0 25 50 75 0.806 0.810 0.792 0.796 0.800 0.804 0.808 100 i out = 1ma 3562 g10 temperature ( c) C50 1.5 f osc (mhz) 1.7 1.9 2.1 C25 0 25 50 75 2.3 2.5 1.6 1.8 2.0 2.2 2.4 100 v in = 5.5v v in = 3.8v v in = 3v v in = 2.7v 3562 g11 load current (ma) 0 1.190 voltage (v) 1.200 1.210 100 200 300 400 500 1.220 1.195 1.205 1.215 600 v in = 3.8v v out = 1.2v (type-b) pulse skip 3562 g12 v in voltage (v) 2.7 3.1 20 i in ( a) 30 45 3.5 4.3 4.7 25 40 35 3.9 5.1 5.5 3562 g13 ldo mode burst mode operation forced burst mode operation i out = 0ma v out = 1.2v voltage (v) 2 0 current (ma) 1 2 3 4 34 5 6 5 6 2.5 3.5 4.5 5.5 3562 g14 i out = 0ma continuous operation 400ma C v out = 1.2v 600ma C v out = 1.2v 400ma C v out = 1.8v 600ma C v out = 1.8v 400ma C v out = 2.5v 600ma C v out = 2.5v 400ma C v out = 3.3v 600ma C v out = 3.3v pulse skip operation 2 s/div v out600a 50mv/div ac coupled inductor current i l = 100ma/ div sw 2v/div 3562 g15 pv in = 3.8v load = 50ma 2 s/div v out600a 50mv/div ac coupled inductor current i l = 150ma/ div sw 2v/div 3562 g16 pv in = 3.8v load = 50ma load current (ma) 0 1.12 voltage (v) 1.14 1.16 1.18 20 40 60 80 100 120 1.20 1.22 1.13 1.15 1.17 1.19 1.21 140 v in = 3.8v v out = 1.2v (type-b) 3562 g17 ldo mode forced burst mode operation v in voltage (v) 2.7 3.1 0 switch r ds(on) ( ) 300 700 3.5 4.3 4.7 100 400 200 600 500 3.9 5.1 5.5 3562 g18 400ma pmos 600ma nmos 400ma nmos 600ma pmos
ltc3562 7 3562fa pin functions agnd (pin 1): analog ground pin. all small-signal com- ponents should connect to this ground, which in turn connects to pgnd at one point. fb400a (pin 2): feedback pin for r400a. when the con- trol loop is complete, this pin servos to 1 of 16 possible set-points based on the programmed value from the i 2 c serial port (see table 4). out400b (pin 3): output voltage feedback pin for r400b. an i 2 c programmable internal resistor divider divides the output voltage down for comparison to the internal reference voltage. this pin converges to 1 of 128 possible set-points based on the programmed value from the i 2 c serial port (see tables 5 and 6). this node must be bypassed to gnd with a 10f or greater ceramic capacitor. sw400b (pin 4): switch node connection to the inductor for r400b. this pin connects to the drains of the internal power mosfet switches of r400b. pgnd (pins 5, 11): power ground pin. connect this pin closely to the (C) terminal of c in . sw400a (pin 6): switch node connection to the inductor for r400a. this pin connects to the drains of the internal power mosfet switches of r400a. v in (pins 7, 8, 9): input supply pin. this pin must be closely decoupled to gnd with a 10f or greater ceramic capacitor. sw600a (pin 10): switch node connection to the inductor for r600a. this pin connects to the drains of the internal power mosfet switches of r600a. sw600b (pin 12): switch node connection to the inductor for r600b. this pin connects to the drains of the internal power mosfet switches of r600b. out600b (pin 13): output voltage feedback pin for r600b. an i 2 c programmable internal resistor divider divides the output voltage down for comparison to the internal reference voltage. this pin converges to 1 of 128 possible set-points based on the programmed value from the i 2 c serial port (see tables 5 and 6). this node must be bypassed to gnd with a 10f or greater ceramic capacitor. fb600a (pin 14): feedback pin for r600a. when the con- trol loop is complete, this pin servos to 1 of 16 possible set-points based on the programmed value from the i 2 c serial port (see table 4). por600a (pin 15): power-on reset for r600a. this open- drain output goes high impedance after a 230ms delay after the output of r600a reaches 92% of its regulation voltage. this output gets pulled to gnd whenever r600a falls below 92% of its regulation voltage. run400a (pin 16): enable pin for r400a, active high. apply a voltage greater than 1v to enable this regulator. run600a (pin 17): enable pin for r600a, active low. apply a voltage less than 0.3v to enable this regulator. dv cc (pin 18): supply voltage for i 2 c lines. this pin sets the logic reference level of the ltc3562. a uvlo circuit on the dv cc pin forces all registers to a default setting whenever dv cc is < 1v. bypass to gnd with a 0.1f capacitor. scl (pin 19): i 2 c clock input. serial data is shifted one bit per clock to control the ltc3562. the logic level for scl is referenced to dv cc . sda (pin 20): i 2 c data input. the logic level for sda is referenced to dv cc . exposed pad (pin 21): ground. must be soldered to pcb ground for electrical contact and optimum thermal performance.
ltc3562 8 3562fa block diagram out400b sw400b en ref mode power good r600a 0.6v r400b 3562 bd 7 1 out600b sw600b en ref mode 0.6v r600b 7 1 fb400a sw400a en ref mode ref600a 0.425v-0.8v 0.425v-0.8v r400a fb fb fb fb 1 4 4 7 2 fb600a sw600a en ref mode dv cc sda scl i 2 c en r600a d/a mode data ref400a 4 d/a 1 run400a 16 v in 7, 8, 9 pgnd 5,11 run600a 17 dv cc 18 sda 20 scl 19 por600a 15 230ms delay agnd 1 3 4 13 12 2 6 14 10
ltc3562 9 3562fa operation introduction the ltc3562 is a highly integrated power management ic that contains four i 2 c controllable, monolithic, high ef- ? ciency step-down regulators. two regulators provide up to 600ma of output current and the other two regulators produce up to 400ma. all four regulators are 2.25mhz, constant-frequency, current mode switching regulators that can be independently controlled through i 2 c. all regula- tors are internally compensated eliminating the need for external compensation components. the ltc3562 offers two different types of adjustable step-down regulators. the two type-a regulators (r600a, r400a) can have the feedback voltages adjusted through i 2 c from 425mv to 800mv in 25mv increments. the two type-b regulators (r600b, r400b) can have the output voltages adjusted through i 2 c control from 600mv to 3.775v in 25mv increments. all four converters support 100% duty cycle operation (low dropout mode) when their input voltage drops very close to their output voltage. to suit a variety of applica- tions, four selectable mode functions are available on the ltc3562s step-down regulators to trade-off noise for ef? ciency. at moderate to heavy loads, the constant-frequency pulse skip mode provides the lowest output switching noise solu- tion. at lighter loads, either burst mode operation, forced burst mode operation or ldo mode may be selected to optimize ef? ciency. the switching regulators also include soft-start to limit inrush current when powering on, short- circuit current protection, and switch node slew limiting circuitry to reduce radiated emi. no external compensation components are required. v fb adjustable (type-a) regulators the two type-a step-down regulators (r600a and r400a) have individual programmable feedback servo voltages via i 2 c control. given a particular feedback servo voltage, the output voltage is programmed using a resistor divider from the switching regulator output connected to the feedback pins (figure 1). the output voltage is related to the feedback servo voltage by the following equation: v outxa = v fbxa r1 r 2 + 1 through i 2 c control, v fbxa can be programmed from 800mv (full scale) down to 425mv in 25mv increments. when the run pins ( run600a and run400a) are used to activate these regulators, the default feedback servo voltage is set to 800mv. typical values for r2 are in the range of 40k to 1m . the capacitor c fb cancels the pole created by the feedback resistors and the input capacitance of the fb pin and also helps to improve transient response for output voltages much greater than 0.8v. a variety of capacitor sizes can be used for c fb but a value of 10pf is recommended for most applications. experimentation with capacitor sizes between 2pf and 22pf may yield improved transient response. regulators r600a and r400a have individual run pins that can enable the regulators without accessing the i 2 c port. the run600a and run400a pins are ored with the enable signals coming from the i 2 c port (refer to the block diagram) such that regulators r600a and r400a can be enabled if the i 2 c port is unavailable. the run600a pin is active low and the run400a pin is active high. when the run pins are activated, the type-a regulators are enabled in a default setting. the default mode for the regulators is pulse skip mode and the default feedback servo voltage setting is 800mv. once enabled with these default settings, the settings can always be changed on the ? y through i 2 c once the i 2 c terminal is available. the maximum operating output current of regulators r600a and r400a are 600ma and 400ma, respectively. figure 1. type-a regulator application circuit r1 c fb l swxa fbxa 425mv to 800mv gnd ltc3562 3562 f01 c o r2
ltc3562 10 3562fa v out adjustable (type-b) regulators unlike the type-a regulators, the two type-b regulators do not require an external resistor divider network to program its output voltage. regulators r600b and r400b have feedback resistor networks internal to the chip whose values can be adjusted through i 2 c control. these inter- nal feedback resistors can be con? gured such that the output voltages can be programmed directly. the output voltages can be programmed from 600mv to 3.775v in 25mv increments. pins out600b and out400b are feedback sense pins that connect to the top of the internal resistor divider networks. these output pins should sense the output voltages of the regulators right at the output capacitor c o (after the inductor), as illustrated in figure 2. the maximum operating current for regulators r600b and r400b are 600ma and 400ma, respectively. the type-b regulators do not have individual run pins as do the type-a regulators. thus regulators r600b and r400b can only be enabled through control of the i 2 c port. when the part initially powers up, the type-b regulators default to shutdown mode and remain disabled until programmed through i 2 c. regulator operating modes all of the ltc3562s switching regulators include four possible operating modes to meet the noise/power needs of a variety of applications. in pulse skip mode, an internal latch is set at the start of every cycle which turns on the main p-channel mosfet switch. during each cycle, a current comparator compares the peak inductor current to the output of an error ampli? er. the output of the current comparator resets the internal latch which causes the main p-channel mosfet switch to turn off and the n-channel mosfet synchronous recti? er to turn on. the n-channel mosfet synchronous recti? er turns off at the end of the 2.25mhz cycle or if the current through the n-channel mosfet synchronous recti? er drops to zero. using this method of operation, the error ampli? er adjusts the peak inductor current to deliver the required output power. all necessary compensation is internal to the switching regulator requiring only a single ceramic output capacitor for stability. at light loads in pulse skip mode, the inductor current may reach zero on each pulse which will turn off the n-channel mosfet synchronous recti? er. in this case, the switch node (sw) goes high impedance and the switch node voltage will ring. this is discontinuous mode operation, and is normal behavior for a switching regulator. at very light loads in pulse skip mode, the switching regulators will automatically skip pulses as needed to maintain output regulation. at high duty cycle (v out > v in /2) it is possible for the inductor current to reverse at light loads, causing the step-down switching regulator to operate continuously. when operating continuously, regulation and low noise output voltage are maintained, but input operating current will increase to a couple ma. in forced burst mode operation, the switching regulators use a constant-current algorithm to control the inductor current. by controlling the inductor current directly and using a hysteretic control loop, both noise and switch- ing losses are minimized. in this mode output power is limited. while operating in forced burst mode operation, figure 2. type-b regular application circuit operation l swxb outxb 600mv to 3.775v gnd ltc3562 3562 f02 c o
ltc3562 11 3562fa the output capacitor is charged to a voltage slightly higher than the regulation point. the step-down converter then goes into sleep mode, during which the output capacitor provides the load current. in sleep mode, most of the regulators circuitry is powered down, helping conserve battery power and increase ef? ciency. when the output voltage drops below a predetermined value, the switching regulator circuitry is powered on and another burst cycle begins. the duration for which the regulator operates in sleep mode depends on the load current. the sleep time decreases as the load current increases. forced burst mode operation has a maximum deliverable output current of about 140ma for the 600ma regulators and 100ma for the 400ma regulators. beyond the maximum deliverable output current, the step-down switching regulator will not enter sleep mode and the output will drop out of regula- tion. forced burst mode operation provides a signi? cant improvement in ef? ciency at light loads at the expense of higher output ripple when compared to pulse skip mode. for many noise-sensitive systems, forced burst mode operation might be undesirable at certain times (i.e., during a transmit or receive cycle of a wireless device), but highly desirable at others (i.e., when the device is in low power standby mode). the i 2 c port can be used to enable or disable forced burst mode operation at any time, offering both low noise and low power operation when they are needed. in burst mode operation, the switching regulator automati- cally switches between ? xed frequency pulse skip operation and hysteretic control as a function of the load current. at light loads the regulators operate in hysteretic mode and at heavy loads they operate in constant-frequency mode. the constant-frequency mode provides the same output ripple and ef? ciency as pulse skip mode while hysteretic mode provides slightly lower output ripple than forced burst mode operation at the expense of slightly lower ef? ciency. finally, the switching regulators have an ldo mode that gives a dc option for regulating their output voltages. in ldo mode, the switching regulators are converted to linear regulators and deliver continuous power from their swx pins through their respective inductors. this mode gives the lowest possible output noise as well as low quiescent current at light loads. dropout operation it is possible for v in to approach a switching regulators programmed output voltage (e.g., a battery voltage of 3.4v with a programmed output voltage of 3.3v). when this happens, the pmos switch duty cycle increases until it is turned on continuously at 100%. in this dropout condi- tion, the respective output voltage equals the regulators input voltage minus the voltage drops across the internal p-channel mosfet and the inductor. soft-start operation soft-start is accomplished by gradually increasing the peak inductor current for each switching regulator over a 500s period. this allows each output to rise slowly, helping minimize the battery in-rush current. a soft- start cycle occurs whenever a given switching regula- tor is enabled, or after a fault condition has occurred (thermal shutdown). a soft-start cycle is not triggered by changing operating modes. this allows seamless output operation when transitioning between burst mode operation, forced burst mode operation, pulse skip mode or ldo mode. switching slew rate control the step-down switching regulators contain new pat- ent pending circuitry to limit the slew rate of the switch node (swx). this new circuitry is designed to transition the switch node over a period of a couple nanoseconds, signi? cantly reducing radiated emi and conducted supply noise, while keeping ef? ciency high. step-down switching regulator in shutdown the step-down switching regulators are in shutdown when not enabled for operation. in shutdown, all circuitry in the step-down switching regulator is disconnected from the switching regulator input supply, leaving only a few nano-amps of leakage current. the step-down switch- ing regulator outputs are individually pulled to ground through a 2k resistor on the switch pin (swx) when in shutdown. operation
ltc3562 12 3562fa i 2 c interface the ltc3562 may communicate with a host (master) using the standard i 2 c 2-wire interface. the timing diagram in figure 4 shows the timing relationship of the signals on the bus. the two bus lines, sda and scl, must be high when the bus is not in use. external pull-up resistors or current sources, such as the ltc1694 smbus accelerator, are required on these lines. the ltc3562 is a receive-only (slave) device. the i 2 c control signals, sda and scl are scaled internally to the dv cc supply. dv cc should be con- nected to the same power supply as the microcontroller generating the i 2 c signals. the i 2 c port has an undervoltage lockout on the dv cc pin. when dv cc is below approximately 1v, the i 2 c serial port is cleared and the two switching type-a regulators are set to full scale. bus speed the i 2 c port is designed to be operated at speeds of up to 400khz. it has built-in timing delays to ensure correct operation when addressed from an i 2 c compliant master device. it also contains input ? lters designed to suppress glitches should the bus become corrupted. start and stop conditions a bus master signals the beginning of a communication to a slave device by transmitting a start condition. a start condition is generated by transitioning sda from high to low while scl is high. when the master has ? nished communicating with the slave, it issues a stop condition by transitioning sda from low to high while scl is high. the bus is then free for communication with another i 2 c device. byte format each byte sent to the ltc3562 must be 8 bits long fol- lowed by an extra clock cycle for the acknowledge bit to be returned by the ltc3562. the data should be sent to the ltc3562 most signi? cant bit (msb) ? rst. acknowledge the acknowledge signal is used for handshaking between the master and the slave. an acknowledge (active low) generated by the slave (ltc3562) lets the master know that the latest byte of information was received. the acknowledge-related clock pulse is generated by the master. the master releases the sda line (high) during the acknowledge clock cycle. the slave-receiver must pull down the sda line during the acknowledge clock pulse so that it remains a stable low during the high period of this clock pulse. slave address byte the ltc3562 responds to only one 7-bit address which has been factory programmed to 11001010. the eighth bit of the address byte (r/w) must be 0 for the ltc3562 to recognize the address since it is a write-only device. this effectively forces the address to be 8 bits long where the least signi? cant bit of the address is 0. if the correct 7-bit address is given but the r/w bit is 1, the ltc3562 will not respond. sub-address byte the sub-address byte uses bits a7 through a4 to specify the regulator(s) being programmed by that particular three-byte sequence (refer to table 2). a speci? c regulator gets programmed if its corresponding sub-address bit is high, whereas the regulator ignores the 3-byte sequence if its sub-address bit is low. note that multiple regulators can be programmed by the same 3-byte sequence if more than one of the sub-address bits are high. bits a1 and a0 of the sub-address byte are used to program the operating mode (table 3). bits a3 and a2 of the sub-address byte are not used. data byte the data byte only affects the regulators that are speci? ed to be programmed by the sub-address byte. the msb of the data byte (b7) is used to enable or disable the regulator(s) being programmed. a high b7 indicates an enable command, whereas a low b7 indicates a shutdown command. operation
ltc3562 13 3562fa table 1. write word protocol used by the ltc3562 171181811 s slave address wr a *sub-address a data byte a p** s = start condition, wr = write bit = 0, a = acknowledge, p = stop condition * the sub-address uses only the ? rst four most signi? cant bits, a7, a6, a5, and a4, for sub-addressing. the two least signi? cant bits, a1 and a0, are used to program the regulator operating mode. **stop can be delayed until all of the data registers have been written. table 2. sub-address and data byte mapping sub-address byte data byte a7 a6 a5 a4 a3 a2 a1 a0 b7 b6 b5 b4 b3 b2 b1 b0 program r600a program r400a program r600b program r400b not used regulator operating mode (see table 3) enable regulator dac code (see tables 4, 5 and 6) figure 3. bit assignments figure 4. timing parameters operation ack 123 address wr 4567 89 123456789123456789 1100101 0 11001010 a7 a6 a5 a4 a3 a2 a1 a0 a7 a6 a5 a4 a3 a2 a1 a0 b7 b6 b5 b4 b3 b2 b1 b0 76543210 ack stop start sda scl ack sub-address data byte 3562 f03 t su, dat t hd, sta t hd, dat sda scl t su, sta t hd, sta t su, sto 3562 f04 t buf t low t high start condition repeated start condition stop condition start condition t r t f t sp
ltc3562 14 3562fa if a type-a regulator is being programmed, then bits b3 through b0 program the dac that controls the regulators feedback servo voltage. this 4-bit sequence programs the feedback voltage from 425mv to 800mv in 25mv incre- ments (table 4). bits b6 through b4 are not used when programming a type-a regulator. if a type-b regulator is being programmed, then bits b6 through b0 program the dac that controls the regulators output voltage. this 7-bit sequence programs the output voltage from 600mv to 3.775v in 25mv increments (tables 5 and 6). bus write operation the master initiates communication with the ltc3562 with a start condition and a 7-bit address followed by the write bit r/w = 0. if the address matches that of the ltc3562, the ltc3562 returns an acknowledge. the master should then deliver the sub-address byte for the regulator(s) being programmed. again the ltc3562 acknowledges and then the data byte is delivered starting with the most signi? cant bit. the data byte and the two mode bits in the sub-address byte are transferred to an internal holding latch for each programmed regulator upon the return of an acknowledge. after the sub-address byte and data byte have been transferred to the ltc3562, the master may terminate the communication with a stop condition. alternatively, a repeat-start condition can be initiated by the master and the entire sequence can be repeated, this time accessing a different sub-address code to program another regulator. likewise, the master can also initiate a repeat-start so that another chip on the i 2 c bus can be addressed. this cycle can continue inde? nitely and the ltc3562s regulators will remember the last input of valid data that it received. once all chips on the bus have been addressed and sent valid data, a global stop condition can be sent and the ltc3562 will update its regulators with the data that it had received. in certain circumstances the data on the i 2 c bus may become corrupted. in these cases the ltc3562 responds appropriately by preserving only the last set of complete data that it has received. for example, assume the ltc3562 has been successfully addressed and is receiving data when a stop condition mistakenly occurs. the ltc3562 will ignore this stop condition and will not respond until a new start condition, correct address, new set of data and stop condition are transmitted. likewise, with only one exception, if the ltc3562 was previously addressed and sent valid data but not updated with a stop, it will respond to any stop that appears on the bus, independent of the number of repeat-starts that have occurred. if a repeat-start is given and the ltc3562 successfully acknowledges its address, it will not respond to a stop until all three bytes of the new data have been received and acknowledged. i 2 c examples to program r600a in forced burst mode operation with its feedback servo voltage set to 600mv: sub-address byte C 1000xx10 data byte C 1xxx0111 to program r600b and r400b in ldo mode with their output voltages set to 1.250v: sub-address byte C 0011xx01 data byte C 10011010 to put the entire chip in shutdown and disable all regula- tors: sub-address byte C 1111xxxx data byte C 0xxxxxxx disabling the i 2 c port the i 2 c serial port can be disabled by grounding the dv cc pin. in this mode, regulators r600a and r400a can only be activated through the individual logic input pins run600a and run400a. disabling the i 2 c port also resets the feed- back servo voltages to the default setting of 0.8v. note that if the i 2 c port gets disabled while a type-a regulator is enabled and its run pin is activated, the regulator will remain enabled and its feedback voltage will immediately be reset to the default setting of 0.8v. if the i 2 c port gets disabled and the run pins are not activated, then the regulators will immediately go into shutdown mode. since regulators r600b and r400b do not have run pins, they immediately go into shutdown once the i 2 c port gets disabled. operation
ltc3562 15 3562fa table 5. type-b regulator base output voltage programming b6 b5 b4 b3 b2 type-b regulator base output voltage 00000 0.600 00001 0.700 00010 0.800 00011 0.900 00100 1.000 00101 1.100 00110 1.200 00111 1.300 01000 1.400 01001 1.500 01010 1.600 01011 1.700 01100 1.800 01101 1.900 01110 2.000 01111 2.100 10000 2.200 10001 2.300 10010 2.400 10011 2.500 10100 2.600 10101 2.700 10110 2.800 10111 2.900 11000 3.000 11001 3.100 11010 3.200 11011 3.300 11100 3.400 11101 3.500 11110 3.600 11111 3.700 table 4. type-a regulator servo voltage programming b3 b2 b1 b0 type-a regulator servo (feedback) voltage 0000 0.425 0001 0.450 0010 0.475 0011 0.500 0100 0.525 0101 0.550 0110 0.575 0111 0.600 1000 0.625 1001 0.650 1010 0.675 1011 0.700 1100 0.725 1101 0.750 1110 0.775 1111 0.800 table 3. regulator operating modes a1 a0 regulator mode 0 0 pulse skip mode 0 1 ldo mode 1 0 forced burst mode operation 1 1 burst mode operation table 6. type-b regulator incremental output voltage programming b1 b0 type-b regulator incremental output voltage 0 0 +0.000 0 1 +0.025 1 0 +0.050 1 1 +0.075 por600a pin the por600a pin is an open-drain output used to indicate that regulator r600a has been enabled and has reached its ? nal voltage. por600a remains low impedance until regulator r600a reaches 92% of its regulation value. a 230ms delay is included to allow a system microcontroller ample time to reset itself. por600a may be used as a power on reset to the microprocessor powered by regula- tor r600a or may be used to enable regulator r400a for supply sequencing. por600a is an open drain output and requires a pull-up resistor to the output voltage of regulator r600a or another appropriate power source. operation
ltc3562 16 3562fa inductor selection many different sizes and shapes of inductors are avail- able from numerous manufacturers. choosing the right inductor from such a large selection of devices can be overwhelming, but following a few basic guidelines will make the selection process much simpler. the step-down converters are designed to work with induc- tors in the range of 2.2h to 10h. for most applications a 4.7h inductor is suggested for the lower power switching regulators r400a and r400b and 3.3h is recommended for the more powerful switching regulators r600a and r600b. larger value inductors reduce ripple current which improves output ripple voltage. lower value inductors result in higher ripple current and improved transient re- sponse time, but will reduce the available output current. to maximize ef? ciency, choose an inductor with a low dc resistance. for a 1.2v output, ef? ciency is reduced about 2% for 100m series resist-ance at 400ma load current, and about 2% for 300m series resistance at 100ma load current. choose an inductor with a dc current rating at least 1.5 times larger than the maximum load current to ensure that the inductor does not saturate during normal operation. if output short circuit is a possible condition, the inductor should be rated to handle the maximum peak current speci? ed for the step-down converters. different core materials and shapes will change the size/cur- rent and price/current relationship of an inductor. toroid or shielded pot cores in ferrite or permalloy? materials are small and do not radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. inductors that are very thin or have a very small volume typically have much higher core and dcr losses, and will not give the best ef? ciency. the choice of which style inductor to use often depends more on the price versus size, performance, and any radiated emi requirements than on what the ltc3562 requires to operate. the inductor value also has an effect on burst mode and forced burst mode operations. lower inductor values will cause the burst mode and forced burst mode switching frequencies to increase. applications information table 7 shows several inductors that work well with the ltc3562s general purpose regulators. these inductors of- fer a good compromise in current rating, dcr and physical size. consult each manufacturer for detailed information on their entire selection of inductors. input/output capacitor selection low esr (equivalent series resistance) ceramic capacitors should be used at the switching regulator outputs as well as the input supply. only x5r or x7r ceramic capacitors should be used because they retain their capacitance over wider voltage and temperature ranges than other ceramic types. a 10f output capacitor is suf? cient for most applications. for good transient response and sta- bility the output capacitor should retain at least 4f of capacitance over operating temperature and bias voltage. the input supply should be bypassed with a 10f capaci- tor, or greater. consult with capacitor manufacturers for detailed information on their selection and speci? cations of ceramic capacitors. many manufacturers now offer table 7. recommended inductors inductor type l ( h) max i dc (a) max dcr ( ) size (mm) (l w h) manufacturer db318c d312c de2812c de2818c 4.7 3.3 4.7 3.3 4.7 3.3 4.7 3.3 1.07 1.20 0.79 0.90 1.15 1.37 1.25 1.45 0.1 0.07 0.24 0.20 0.13* 0.105* 0.072* 0.052* 3.8 3.8 1.8 3.8 3.8 1.8 3.6 3.6 1.2 3.6 3.6 1.2 3.0 2.8 1.2 3.0 2.8 1.2 3.0 2.8 1.8 3.0 2.8 1.8 toko www.toko.com cdrh3d16 cdrh2d11 cls4d09 4.7 3.3 4.7 3.3 4.7 0.9 1.1 0.5 0.6 0.75 0.11 0.085 0.17 0.123 0.19 4 4 1.8 4 4 1.8 3.2 3.2 1.2 3.2 3.2 1.2 4.9 4.9 1 sumida www.sumida.com sd3118 sd3112 sd12 sd10 4.7 3.3 4.7 3.3 4.7 3.3 4.7 3.3 1.3 1.59 0.8 0.97 1.29 1.42 1.08 1.31 0.162 0.113 0.246 0.165 0.117* 0.104* 0.153* 0.108* 3.1 3.1 1.8 3.1 3.1 1.8 3.1 3.1 1.2 3.1 3.1 1.2 5.2 5.2 1.2 5.2 5.2 1.2 5.2 5.2 1.0 5.2 5.2 1.0 cooper www.cooperet.com lps3015 4.7 3.3 1.1 1.3 0.2 0.13 3.0 3.0 1.5 3.0 3.0 1.5 coil craft www.coilcraft.com * typical dcr
ltc3562 17 3562fa very thin (<1mm tall) ceramic capacitors ideal for use in height-restricted designs. table 8 shows a list of several ceramic capacitor manufacturers. table 8. recommended ceramic capacitor manufacturers avx www.avxcorp.com murata www.murata.com taiyo yuden www.t-yuden.com vishay siliconix www.vishay.com tdk www.tdk.com printed circuit board layout considerations to deliver maximum current under all conditions, it is critical that the exposed metal pad on the backside of the ltc3562 package be soldered to the pc board ground. correctly soldered to a 2500mm 2 double-sided 1oz. copper board, the ltc3562 has a thermal resistance of less than 68c/w. failure to make thermal contact between the exposed pad on the backside of the package and the copper board will result in higher thermal resistances. furthermore, due to its high frequency switching circuitry, it is imperative that the input capacitors, inductors, and output capacitors be as close to the ltc3562 as possible and that there be an unbroken ground plane under the ltc3562 and all of its external high frequency compo- nents. high frequency currents on the ltc3562 tend to ? nd their way along the ground plane in a myriad of paths ranging from directly back to a mirror path beneath the incident path on the top of the board. if there are slits or cuts in the ground plane due to other traces on that layer, the current will be forced to go around the slits. if high frequency currents are not allowed to ? ow back through their natural least-area path, excessive voltage will build up and radiated emissions will occur. there should be a group of vias directly under the grounded backside of the package leading directly down to an internal ground plane. to minimize parasitic inductance, the ground plane should be on the second layer of the pc board. applications information figure 5. high frequency ground currents follow their incident path. slices in the ground cause high voltage and increased emissions. 3562 f05
ltc3562 18 3562fa typical application quad step-down converter with push button control and power sequencing sw600b v cc core v cc i/o r5 100k 100k r1 634k c6 10pf l1 3.3 h c5 10 f out600b sw400b por600a v in sda scl dv cc sw600a fb600a run600a run400a sw400a fb400a out400b pgnd agnd ltc3562 v out 600b 3.3v 600ma li-ion battery 3.4v to 4.2v microprocessor 3562 ta02 c1 10 f r2 499k r3 1070k c7 10pf l2 4.7 h c2 10 f r4 499k l3 3.3 h c3 10 f v out 400b 1.2v 400ma l4 4.7 h c4 10 f v out 400a 2.5v 400ma v out 600a 1.8v 600ma por scl sda
ltc3562 19 3562fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description ud package 20-lead plastic qfn (3mm 3mm) (reference ltc dwg # 05-08-1720 rev ?) 3.00 0.10 (4 sides) recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 1.65 0.05 note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 bottom view?xposed pad 1.65 0.10 (4-sides) 0.75 0.05 r = 0.115 typ r = 0.05 typ 0.20 0.05 1 pin 1 notch r = 0.20 typ or 0.25 45 chamfer 19 20 2 0.40 bsc 0.200 ref 2.10 0.05 3.50 0.05 (4 sides) 0.70 0.05 0.00 ?0.05 (ud20) qfn 0306 rev a 0.20 0.05 0.40 bsc package outline
ltc3562 20 3562fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2007 lt 1207 rev a ? printed in usa related parts part number description comments ltc3406/ ltc3406b 600ma i out , 1.5mhz, synchronous step-down dc/dc converter 96% ef? ciency, v in(min) = 2.5v, v in(max) = 5.5v, v out(min) = 0.6v, i q = 20a, i sd < 1a, thinsot? package ltc3407/ ltc3407-2 dual 600ma/800ma i out , 1.5mhz/2.25mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in(min) = 2.5v, v in(max) = 5.5v, v out(min) = 0.6v, i q = 40a, i sd < 1a, ms10e and dfn packages ltc3410/ ltc3410b 300ma i out , 2.25mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in(min) = 2.5v, v in(max) = 5.5v, v out(min) = 0.8v, i q = 26a, i sd < 1a, sc70 package ltc3531/ltc3531-3/ ltc3531-3.3 200ma i out , 1.5mhz, synchronous buck-boost dc/dc converter 95% ef? ciency, v in(min) = 1.8v, v in(max) = 5.5v, v out(min) : 2v to 5v, i q = 16a, i sd < 1a, thinsot and dfn packages ltc3532 500ma i out , 2mhz, synchronous buck-boost dc/dc converter 95% ef? ciency, v in(min) = 2.4v, v in(max) = 5.5v, v out(min) : 2.4v to 5.25v, i q = 35a, i sd < 1a, ms10 and dfn packages ltc3542 500ma i out , 2.25mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in(min) = 2.5v, v in(max) = 5.5v, v out(min) = 0.6v, i q = 26a, i sd < 1a, 2mm 2mm dfn package ltc3544/ltc3544b quad 300ma and 2 200ma and 100ma, 2.25mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in(min) = 2.5v, v in(max) = 5.5v, v out(min) = 0.8v, i q = 70a, i sd < 1a, 3mm 3mm qfn package ltc3547/ ltc3547b dual 300ma, 2.25mhz, synchronous step-down dc/dc converter 96% ef? ciency, v in(min) = 2.5v, v in(max) = 5.5v, v out(min) = 0.6v, i q = 40a, i sd < 1a, 2mm 3mm dfn package ltc3548/ltc3548-1/ ltc3548-2 dual 400ma and 800ma i out , 2.25mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in(min) = 2.5v, v in(max) = 5.5v, v out(min) = 0.6v, i q = 40a, i sd < 1a, ms10e and dfn packages ltc3560 800ma i out , 2.25mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in(min) = 2.5v, v in(max) = 5.5v, v out(min) = 0.6v, i q = 16a, i sd < 1a, thinsot package thinsot is a trademark of linear technology corporation

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